Dr. Heinrich Riebler

Mitglied - Postdoc

Hochleistungsrechnen
Mitglied - Postdoc
Paderborn Center for Parallel Computing (PC2)
Mitglied - Postdoc
Fachberater FPGA Beschleunigung
E-Mail:
heinrich.riebler@uni-paderborn.de
Telefon:
+49 5251 60-5382
Web:
Homepage
Büro­anschrift:
Mersinweg 5
33100 Paderborn
Raum:
X1.119

Publikationen

Aktuelle Publikationen

FINN-HPC: Closing the Gap for Energy-Efficient Neural Network Inference on FPGAs in HPC

L. Jungemann, B. Wintermann, H. Riebler, C. Plessl, in: Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, ACM, New York City, 2025.

DOI

AuroraFlow, an Easy-to-Use, Low-Latency FPGA Communication Solution Demonstrated on Multi-FPGA Neural Network Inference

G. Pape, B. Wintermann, L. Jungemann, M. Lass, M. Meyer, H. Riebler, C. Plessl, in: Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2025.

DOI

Otus Supercomputer

S. Ehtesabi, M. Hossain, T. Kenter, A. Krawinkel, L. Ostermann, C. Plessl, H. Riebler, S. Rohde, R. Schade, M. Schwarz, J. Simon, N. Winnwa, A. Wiens, X. Wu, Otus Supercomputer, Paderborn Center for Parallel Computing (PC2), Paderborn, 2025.

DOI

Noctua 2 Supercomputer

C. Bauer, T. Kenter, M. Lass, L. Mazur, M. Meyer, H. Nitsche, H. Riebler, R. Schade, M. Schwarz, N. Winnwa, A. Wiens, X. Wu, C. Plessl, J. Simon, Journal of Large-Scale Research Facilities 9 (2024).

DOI PDF

A Computation of the Ninth Dedekind Number Using FPGA Supercomputing

L. Van Hirtum, P. De Causmaecker, J. Goemaere, T. Kenter, H. Riebler, M. Lass, C. Plessl, ACM Transactions on Reconfigurable Technology and Systems 17 (2024) 1–28.

DOI

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